So I got this Xilinx Spartan-3A Board by Avnet recently. I bought it because it features a fairly large parallel flash chip (32 MBit) and an even larger SPI flash (128 Mbit).
The board also features three clocks. One 16MHz clock is driven by an on-board oscillator while the other two (12 MHz and 32 kHz) are derived from a small controller.
For the last few evenings, I tried to get the parallel flash to work. Since a single cycle of the slow 32 kHz clock meets the timing requirements of the parallel flash chip, I thought I’d try to use that before enhancing the design to also work w/ the faster clock(s).
Unfortunately, that didn’t work. When using the slow clock, mapping a signal directly to an output (LED) worked just fine, but routing the signal through more than few flip-flops didn’t work at all. Apparently, the FPGA didn’t like the slow clock too much.
Bottom line: Took me three days to figure out that the board doesn’t work with the slow 32 kHz clock. Oh well, at least I learned something new…